The key to a quick and cheap 7nm product launch for Intel is to take a leaf out of AMD’s playbook. Over at the Global TMT conference, Murthy Reduchintala, Intel’s chief engineering officer (among numerous other titles), told investors and analysts that roughly 50% of its processor R&D budget is spent on updating non-core logic to the latest process node, and that this has to change in order to ramp up effectively. That’s by and large the same plan AMD had with Zen 2. While the core clusters, or CCDs, were manufactured by TSMC on its 7nm process, all the non-processing engine silicon – which is responsible for I/O, interconnectivity, and extraneous functions – was shifted off onto a separate 12nm cIOD chiplet manufactured by GlobalFoundries. So in a roundabout way Intel’s pretty keen on replicating this successful, and cheap, heterogeneous approach – which is becoming increasingly more alluring to global chipmakers. “One of the challenges we always had in the paradigm of monolithic integration is not only do you have to put the IP that benefits from logic scaling, like your processing engines, but you also have to put all of the mixed signal and analogue IP and interconnect IP that requires the connection of those compute ingredients together,” Murthy Renduchintala says.
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